Implementing a Rasterization Framework for a Black Hole Space-Time; 2016年07月 発表情報; Journal of Information Processing, 24, 4, 10 著者; Yoshiyuki Yamashita
Rule Pattern Parallelization of Packet Filters on Muti-Core Environments; 2011年09月 発表情報; HPCC 2011 (2011 IEEE International Conference on High Performance Computing and Communications), 116-125 著者; Yoshiyuki Yamashita and Masato Tsuru
Implementation and Evaluation of Fast Parallel Packet Filters on a Cell Processor; 2010年07月 発表情報; NDT 2010 (the 2nd international Conference on Networked Digital Technologies), CCIS, 87, 197-212 著者; Yoshiyuki Yamashita and Masato Tsuru
Implementing Fast Packet Filters by Software Pipelining on x86 Processors; 2009年09月 発表情報; APPT09 (the 8th international Conference on Advanced Parallel Processing Technologies), Lecture Note in Computer Sciences, 5737, 420-435 著者; Yoshiyuki Yamashita and Masato Tsuru
Software Pipelining for Packet Filters; 2007年09月 発表情報; Proc. 3rd Int. Conf. on High Performance Computing and Communication (HPCC07), Lecture Notes in Computer Science (LNCS), 4782, 446-459 著者; Yoshiyuki Yamashita and Masato Tsuru
Code Optimization for Packet Filters; 2007年01月 発表情報; SAINT2007(International Symposium on Applications and the Internet), Workshop on Internet Measurement Technology and its Applications to Building Next Generation Internet CD-ROM (Jan. 2007). 著者; YAMASHITA Yoshiyuki and Masato Tsuru
Register Allocation Methods of Improved Software Pipelining for Loops with Conditional Branches; 2006年 発表情報; Electoronics and Communications in Japan, Part 3, Vol. 89, No. 12 (2006) pp.59-69., 89, 12, 59-69 著者; Hiroya Itoga, Tomohiro Haraikawa, Yoshiyuki Yamashita and Ikuo Nakata