日本語フィールド
著者：Yoshiyuki Yamashita and Masato Tsuru題名：Implementing Fast Packet Filters by Software Pipelining on x86 Processors発表情報：APPT09 (the 8th international Conference on Advanced Parallel Processing Technologies), Lecture Note in Computer Sciences 巻: 5737 ページ: 420-435キーワード：packet filter, code optimization概要：Intel x86プロセッサを用いて、高速なパケットフィルタを実装し、評価した。結果、素朴な実装に比べ、２倍以上の高速化を実現できた。高速化技法として、ソフトウェアパイプライン化を応用した。抄録：Packet filters are essential for network traffic/security management on the Internet.
Filters implemented by software on general-purpose CPUs are very flexible but occasionally suffer from poor performance.
In order to address this problem, we have investigated software pipelining techniques for loops with a number of conditional branches for use in software-based fast packet filters.
Based on our previous researches, we herein apply the software pipelining approach in an attempt to increase the filter performance for large filter rules.
We validate the effectiveness of the proposed approach on Intel x86-32/64 series,
as well as Intel Itanium 2 processors,
which speaks to the generality and practicality of the proposed approach.
The software pipelined program codes on x86-64 processors are 2.2 times faster than
C-compiler-based codes and 1.8 times faster than carefully optimized hand-compiled
codes.
In addition, the performance of the pipelined codes we obtained on x86-64
processors
is comparable to that on Itanium 2 processors with predicate registers.英語フィールド
Author：Yoshiyuki Yamashita and Masato TsuruTitle：Implementing Fast Packet Filters by Software Pipelining on x86 ProcessorsAnnouncement information:APPT09 (the 8th international Conference on Advanced Parallel Processing Technologies), Lecture Note in Computer Sciences Vol: 5737 Page: 420-435Keyword：packet filter, code optimizationAn abstract：Packet filters are essential for network traffic/security management on the Internet.
Filters implemented by software on general-purpose CPUs are very flexible but occasionally suffer from poor performance.
In order to address this problem, we have investigated software pipelining techniques for loops with a number of conditional branches for use in software-based fast packet filters.
Based on our previous researches, we herein apply the software pipelining approach in an attempt to increase the filter performance for large filter rules.
We validate the effectiveness of the proposed approach on Intel x86-32/64 series,
as well as Intel Itanium 2 processors,
which speaks to the generality and practicality of the proposed approach.
The software pipelined program codes on x86-64 processors are 2.2 times faster than
C-compiler-based codes and 1.8 times faster than carefully optimized hand-compiled
codes.
In addition, the performance of the pipelined codes we obtained on x86-64
processors
is comparable to that on Itanium 2 processors with predicate registers.