日本語フィールド
著者:Y.Nishioka, K.Shiozawa, T.Oishi, K.Kanamoto, Y.Tokuda, H.Sumitani, S.Aya, H.Yabe, K.Itoga, T.Hifumi, K.Marumoto, T.Kuroiwa, T.Kawahara, K.Nishikawa, T.Oomori, T.Fujino, S.Yamamoto, S.Uzawa, M.Kimata, M.Nunoshita and H.Abe題名:Giga-bit scale DRAM cell with new simple Ru/(Ba,Sr)TiO3/Ru stacked capacitors using X-ray lithography発表情報:Technical Digest of 1995 International Electron Devices Meeting (IEDM1995), December 10-13, 1995, Washington DC, pp.903-906.キーワード:概要:抄録:英語フィールド
Author:Y.Nishioka, K.Shiozawa, T.Oishi, K.Kanamoto, Y.Tokuda, H.Sumitani, S.Aya, H.Yabe, K.Itoga, T.Hifumi, K.Marumoto, T.Kuroiwa, T.Kawahara, K.Nishikawa, T.Oomori, T.Fujino, S.Yamamoto, S.Uzawa, M.Kimata, M.Nunoshita and H.AbeTitle:Giga-bit scale DRAM cell with new simple Ru/(Ba,Sr)TiO3/Ru stacked capacitors using X-ray lithographyAnnouncement information:Technical Digest of 1995 International Electron Devices Meeting (IEDM1995), December 10-13, 1995, Washington DC, pp.903-906.